Types of Memory in Computer Architecture

Lesson

We can think of the different kinds of memory in a computer in terms of a memory hierarchy – ordered by how fast it is for the processor to access the different types. From fastest to slowest:

Processor registers, caches and RAM are classed as primary memory whilst disk storage is secondary memory.

Processor Registers

Processor registers are the fastest form of memory which the processor accesses – basically they are an easy place for the processor to get and set data. They are a part of the CPU. They have individual names and can be referenced directly. Some of them have particular purposes whilst others are general purpose. There is only a limited number available on any given CPU, and they are limited in size (up to 64 bits on 64 bit CPUs such as x64 architectures). Because they are so fast to access, using them effectively can have a significant impact on the performance of a computer program.

Processor Cache

A cache stores data which is needed by the processor for future use. Modern processors often have one or more 'processor cache' which are typically integrated within the CPU.

Data Caches

Data caches are used to temporarily store data which has been accessed in memory or is likely to be required in the future. There are often multiple levels, with level 1 being the fastest and smallest.

Instruction Cache

As the name suggests, the instruction cache stores instructions ready for fast execution to avoid having to look up the next instruction in RAM every time.

Translation Lookaside Buffer (TLB)

To read data or instructions out of memory, the processor usually has to consult a large mapping table to know where to go. A TLB caches commonly needed memory mappings to speed up this process.

Random Access Memory (RAM)

RAM is volatile memory which is fast for the processor to access, although not as fast as the memory types which are physically integrated with the CPU. Modern computers may have anything from 512MB to over 256GB of RAM. It is volatile memory which means that it doesn't preserve data when it loses power.

Memory Models

Over time, there have been several different models used for addressing memory. The original model is called 'real mode' whilst today 64 bit CPUs use 'long mode', 32 bit systems typically use 'protected mode'. However, even on modern systems, the CPU may start in real mode (or something similar to real mode) before the operating system is loaded.

Physical vs Virtual Memory

RAM is made up of addressable blocks of memory which can store values. Each block is assigned a physical address. However, we don't give programs this physical address - instead, we use virtual addresses. Virtual addressing provides a layer of abstraction and lets us have lots of different programs sharing the same physical address space. The CPU will typically have a memory management unit (MMU) to provide translation between virtual addresses and physical addresses.

Memory Pages and Paging

Virtual memory is divided into sections called pages which are typically 4KB. Each virtual page is mapped to a physical memory range of the same size. The MMU contains a directory with where each virtual page is stored in RAM – this is called the page table. Instead of keeping all virtual pages in RAM, a page may instead be stored on a slower, secondary storage device like a hard drive. If the CPU tries to access a page which is not in RAM, it causes a 'page fault', and the page gets loaded from the secondary storage into RAM. This process is called paging.

Disk Drive

Compared to RAM and the integrated processor storage areas (registers and cache), disk drives are slow! Data isn't read directly from this kind of storage by the processor; instead, it will first be loaded into RAM. Disk storage is also referred to as 'secondary' memory.

In modern architectures, it also is increasingly common to use network or 'cloud' based storage, which adds additional latency.

References

Learn more about this topic by checking out these references.

Memory Hierarchy Design
Department of Computer Science, University of Maryland